This project features a complete JPEG Hardware Compressor. Source code is verilog.




File list:
adder.v
AROMAC.v
aromdc.v
categoryselect.v
Dct.v
Dct1d.v
engine.v
EngineZigZag.v
entropyencoder.v
flipflop.v
flushlogic.v
fulladd.v
fullsub.v
Half_Add.v
huffmanencoder.v
jpeg.v
multiplier.v
newrlcctrl.v
nrom0.v
nrom1.v
nrom2.v
nrom3.v
nrom4.v
nrom5.v
nrom6.v
nrom7.v
packer.v
rlcarch.v
rlcctrl.v
Rom.v
stripper.v
transpose.v
zerorunlengthcoder.v
ZigZag.v