vhdl code for decoder




File list:
decoder_1
........\db
........\..\logic_util_heursitic.dat
........\..\my_decode.(0).cnf.cdb
........\..\my_decode.(0).cnf.hdb
........\..\my_decode.amm.cdb
........\..\my_decode.asm.qmsg
........\..\my_decode.asm.rdb
........\..\my_decode.asm_labs.ddb
........\..\my_decode.cbx.xml
........\..\my_decode.cmp.bpm
........\..\my_decode.cmp.cdb
........\..\my_decode.cmp.hdb
........\..\my_decode.cmp.kpt
........\..\my_decode.cmp.logdb
........\..\my_decode.cmp.rdb
........\..\my_decode.cmp0.ddb
........\..\my_decode.cmp1.ddb
........\..\my_decode.cmp2.ddb
........\..\my_decode.cmp_merge.kpt
........\..\my_decode.db_info
........\..\my_decode.fit.qmsg
........\..\my_decode.hier_info
........\..\my_decode.hif
........\..\my_decode.idb.cdb
........\..\my_decode.lpc.html
........\..\my_decode.lpc.rdb
........\..\my_decode.lpc.txt
........\..\my_decode.map.bpm
........\..\my_decode.map.cdb
........\..\my_decode.map.hdb
........\..\my_decode.map.kpt
........\..\my_decode.map.logdb
........\..\my_decode.map.qmsg
........\..\my_decode.map_bb.cdb
........\..\my_decode.map_bb.hdb
........\..\my_decode.map_bb.logdb
........\..\my_decode.pre_map.cdb
........\..\my_decode.pre_map.hdb
........\..\my_decode.rtlv.hdb
........\..\my_decode.rtlv_sg.cdb
........\..\my_decode.rtlv_sg_swap.cdb
........\..\my_decode.sgdiff.cdb
........\..\my_decode.sgdiff.hdb
........\..\my_decode.sld_design_entry.sci
........\..\my_decode.sld_design_entry_dsc.sci
........\..\my_decode.smart_action.txt
........\..\my_decode.sta.qmsg
........\..\my_decode.sta.rdb
........\..\my_decode.sta_cmp.7_slow.tdb
........\..\my_decode.syn_hier_info
........\..\my_decode.tis_db_list.ddb
........\..\my_decode.tmw_info
........\..\prev_cmp_my_decode.map.qmsg
........\..\prev_cmp_my_decode.qmsg
........\incremental_db
........\..............\compiled_partitions
........\..............\...................\my_decode.db_info
........\..............\...................\my_decode.root_partition.cmp.atm
........\..............\...................\my_decode.root_partition.cmp.cdb
........\..............\...................\my_decode.root_partition.cmp.dfp
........\..............\...................\my_decode.root_partition.cmp.hdb
........\..............\...................\my_decode.root_partition.cmp.hdbx
........\..............\...................\my_decode.root_partition.cmp.kpt
........\..............\...................\my_decode.root_partition.cmp.logdb
........\..............\...................\my_decode.root_partition.cmp.rcf
........\..............\...................\my_decode.root_partition.cmp.rcfdb
........\..............\...................\my_decode.root_partition.map.atm
........\..............\...................\my_decode.root_partition.map.cdb
........\..............\...................\my_decode.root_partition.map.dpi
........\..............\...................\my_decode.root_partition.map.hbdb.cdb
........\..............\...................\my_decode.root_partition.map.hbdb.hb_info
........\..............\...................\my_decode.root_partition.map.hbdb.hdb
........\..............\...................\my_decode.root_partition.map.hbdb.sig
........\..............\...................\my_decode.root_partition.map.hdb
........\..............\...................\my_decode.root_partition.map.hdbx
........\..............\...................\my_decode.root_partition.map.kpt
........\..............\README
........\decoder.bdf
........\my_decode.asm.rpt
........\my_decode.cdf
........\my_decode.done
........\my_decode.fit.rpt
........\my_decode.fit.smsg
........\my_decode.fit.summary
........\my_decode.flow.rpt
........\my_decode.map.rpt
........\my_decode.map.summary
........\my_decode.pin
........\my_decode.pof
........\my_decode.qpf
........\my_decode.qsf
........\my_decode.qws
........\my_decode.sof
........\my_decode.sta.rpt
........\my_decode.sta.summary
........\my_decode.tan.rpt
........\my_decode.tan.summary
........\my_decode.v
........\my_decode.v.bak
........\my_decode_assignment_defaults.qdf
........\Verilog1.v
........\Verilog1.v.bak