Arbiter code for simulation purpose




File list:
arbiter_ip
.........\db
.........\..\arbiter_2ip.(0).cnf.cdb
.........\..\arbiter_2ip.(0).cnf.hdb
.........\..\arbiter_2ip.ae.hdb
.........\..\arbiter_2ip.cbx.xml
.........\..\arbiter_2ip.cmp.rdb
.........\..\arbiter_2ip.db_info
.........\..\arbiter_2ip.hier_info
.........\..\arbiter_2ip.hif
.........\..\arbiter_2ip.ipinfo
.........\..\arbiter_2ip.lpc.html
.........\..\arbiter_2ip.lpc.rdb
.........\..\arbiter_2ip.lpc.txt
.........\..\arbiter_2ip.map.qmsg
.........\..\arbiter_2ip.map.rdb
.........\..\arbiter_2ip.pre_map.cdb
.........\..\arbiter_2ip.pre_map.hdb
.........\..\arbiter_2ip.qns
.........\..\arbiter_2ip.rtlv.hdb
.........\..\arbiter_2ip.rtlv_sg.cdb
.........\..\arbiter_2ip.rtlv_sg_swap.cdb
.........\..\arbiter_2ip.sas
.........\..\arbiter_2ip.sld_design_entry.sci
.........\..\arbiter_2ip.sld_design_entry_dsc.sci
.........\..\arbiter_2ip.smart_action.txt
.........\..\arbiter_2ip.tmw_info
.........\..\logic_util_heursitic.dat
.........\..\prev_cmp_arbiter_2ip.qmsg
.........\incremental_db
.........\..............\compiled_partitions
.........\..............\...................\arbiter_2ip.db_info
.........\..............\README
.........\output_files
.........\............\arbiter_2ip.done
.........\............\arbiter_2ip.flow.rpt
.........\............\arbiter_2ip.map.rpt
.........\............\arbiter_2ip.map.smsg
.........\............\arbiter_2ip.map.summary
.........\simulation
.........\..........\modelsim
.........\..........\........\rtl_work
.........\..........\........\........\arbiter_2ip
.........\..........\........\........\...........\verilog.prw
.........\..........\........\........\...........\verilog.psm
.........\..........\........\........\...........\_primary.dat
.........\..........\........\........\...........\_primary.dbs
.........\..........\........\........\...........\_primary.vhd
.........\..........\........\........\_temp
.........\..........\........\........\_info
.........\..........\........\........\_vmake
.........\..........\........\arbiter_2ip_run_msim_rtl_verilog.do
.........\..........\........\arbiter_2ip_run_msim_rtl_verilog.do.bak
.........\..........\........\arbiter_2ip_run_msim_rtl_verilog.do.bak1
.........\..........\........\arbiter_2ip_run_msim_rtl_verilog.do.bak2
.........\..........\........\arbiter_2ip_run_msim_rtl_verilog.do.bak3
.........\..........\........\modelsim.ini
.........\..........\........\msim_transcript
.........\..........\........\vsim.wlf
.........\arbiter_2ip.qpf
.........\arbiter_2ip.qsf
.........\arbiter_2ip.qws
.........\arbiter_2ip.v
.........\arbiter_2ip.v.bak
.........\arbiter_2ip_nativelink_simulation.rpt