debouncer in vhdl with clock devider parameter and number of inputs




File list:
debouncer_vhdl
.............\branches
.............\tags
.............\trunk
.............\.....\bench
.............\.....\.....\debounce_atlys.ucf
.............\.....\.....\debounce_atlys_test.vhd
.............\.....\.....\debounce_atlys_test.wcfg
.............\.....\.....\debounce_atlys_top.par
.............\.....\.....\debounce_atlys_top.syr
.............\.....\.....\debounce_atlys_top.twr
.............\.....\.....\debounce_atlys_top.vhd
.............\.....\.....\debounce_atlys_top.xst
.............\.....\.....\debounce_atlys_top_bit.zip
.............\.....\.....\debounce_atlys_top_isim_beh1.wdb
.............\.....\.....\debounce_atlys_top_map.map
.............\.....\.....\debounce_atlys_top_map.mrp
.............\.....\.....\debounce_atlys_top_map.psr
.............\.....\.....\debounce_atlys_top_summary.html
.............\.....\.....\debounce_vhdl_bench.gise
.............\.....\.....\debounce_vhdl_bench.xise
.............\.....\.....\fuse.xmsgs
.............\.....\.....\fuseRelaunch.cmd
.............\.....\.....\grp_debouncer.vhd
.............\.....\.....\par_usage_statistics.html
.............\.....\.....\pepExtractor.prj
.............\.....\.....\readme.txt
.............\.....\.....\scope_photos.zip
.............\.....\doc
.............\.....\license
.............\.....\.......\lgpl.txt
.............\.....\rtl
.............\.....\...\grp_debouncer.vhd
.............\.....\...\readme.txt