Parallel to 5 pair HDSDI encode/decode




File list:
DualLink
.......\Constraints
.......\...........\alp_top_dual.ucf
.......\Docs
.......\....\Firmware_Description_DualLink.pdf
.......\....\ipt_reg_dual.txt
.......\....\ipt_reg_dual.xls
.......\....\RLE Dual Link 100 Bars.xls
.......\....\RLE Pattern Gen Sheet.xls
.......\ISE_Project
.......\...........\alp_prj_dual_Verilog.ise
.......\...........\alp_prj_dual_vhdl.ise
.......\...........\alp_top_dual_verilog.bit
.......\...........\alp_top_dual_Verilog.lso
.......\...........\alp_top_dual_Verilog.prj
.......\...........\alp_top_dual_Verilog.xst
.......\...........\alp_top_dual_vhdl.bit
.......\...........\alp_top_dual_VHDL.lso
.......\...........\alp_top_dual_VHDL.prj
.......\...........\alp_top_dual_VHDL.xst
.......\...........\Makefile
.......\...........\makefile_hdl
.......\...........\okBTPipeIn.ngc
.......\...........\okBTPipeOut.ngc
.......\...........\okHostInterfaceCore.ngc
.......\...........\okPipeIn.ngc
.......\...........\okPipeOut.ngc
.......\...........\okTriggerIn.ngc
.......\...........\okTriggerOut.ngc
.......\...........\okWireIn.ngc
.......\...........\okWireOut.ngc
.......\RTL_Common
.......\..........\alpIfDecode_fa01.v
.......\..........\alpIfHandler_fa01.v
.......\..........\alpPortReg_fa01.v
.......\..........\alpReg_fa02.v
.......\..........\ClkChkGen_fa01.v
.......\..........\EZLinkALP_h_fa02.v
.......\..........\i2c_master_bit_ctrl.v
.......\..........\i2c_master_byte_ctrl.v
.......\..........\i2c_master_defines.v
.......\..........\i2c_master_top.v
.......\..........\meta_fa01.v
.......\..........\okLibrary.v
.......\..........\ok_h_fa01.v
.......\..........\qi2c_fa01.v
.......\..........\qi2c_h_fa01.v
.......\..........\qi2c_sm_fa01.v
.......\..........\qi2c_wrapper_fa01.v
.......\..........\qsmb_h_fa01.v
.......\..........\qsmb_sm_fa01.v
.......\..........\smbus_fa01.v
.......\..........\ubusDecode_fa02.v
.......\..........\ubus_sm_fa01.v
.......\RTL_Verilog
.......\...........\Control
.......\...........\.......\ipt_clk_rst_top.v
.......\...........\.......\ipt_duallink_clk.v
.......\...........\.......\ipt_duallink_lmk.v
.......\...........\.......\ipt_pll_lut.v
.......\...........\.......\ipt_reg.v
.......\...........\.......\ipt_rst_ctrl.v
.......\...........\.......\ipt_sys_ctrl_decode.v
.......\...........\.......\ipt_uwire_ctrl.v
.......\...........\.......\ipt_uwire_master.v
.......\...........\Datapath
.......\...........\........\Timing_Patterns
.......\...........\........\...............\duallink_444_12bit.v
.......\...........\........\...............\duallink_444_alpha.v
.......\...........\........\...............\ipt_smpte75.v
.......\...........\........\...............\rle_75_75_bars.v
.......\...........\........\...............\rle_chroma_bars_lut.v
.......\...........\........\...............\rle_iq_pluge_lut.v
.......\...........\........\...............\timing_pattern.v
.......\...........\........\ipt_3GB_demerge.v
.......\...........\........\ipt_duallink_dp.v
.......\...........\........\ipt_duallink_dp_rx.v
.......\...........\........\ipt_duallink_dp_tx.v
.......\...........\........\ipt_duallink_tpg.v
.......\...........\........\ipt_retime.v
.......\...........\........\ipt_smpte352_insert.v
.......\...........\........\TimingGen.v
.......\...........\........\Trs_Crc.v
.......\...........\IO
.......\...........\..\Descrambler.v
.......\...........\..\ipt_crc_chk.v
.......\...........\..\ipt_crc_ctrl.v
.......\...........\..\ipt_deser_v3.v
.......\...........\..\ipt_rx_clkin.v
.......\...........\..\ipt_rx_io_top.v
.......\...........\..\ipt_rx_top.v
.......\...........\..\ipt_rx_vid_mon.v
.......\...........\..\ipt_rx_vid_top.v
.......\...........\..\ipt_scrambler.v
.......\...........\..\ipt_ser.v
.......\...........\..\ipt_smpte352_extract.v
.......\...........\..\ipt_std_detect.v
.......\...........\..\ipt_sync_fifo.v
.......\...........\..\ipt_tx_io.v
.......\...........\..\ipt_tx_top.v
.......\...........\alp_top_dual_Verilog.v
.......\...........\ipt_duallink_top.v
.......\...........\ipt_include.v
.......\...........\nsm_top.v
.......\RTL_VHDL
.......\........\Control
.......\........\.......\ipt_clk_rst_top.vhd
.......\........\.......\ipt_duallink_clk9.vhd
.......\........\.......\ipt_duallink_lmk.vhd
.......\........\.......\ipt_pll_lut.vhd
.......\........\.......\ipt_reg.vhd
.......\........\.......\ipt_rst_ctrl_v3.vhd
.......\........\.......\ipt_sys_ctrl_decode.vhd
.......\........\.......\ipt_uwire_ctrl.vhd
.......\........\.......\ipt_uwire_master.vhd
.......\........\Datapath
.......\........\........\Timing_Patterns
.......\........\........\...............\duallink_444_12bit.vhd
.......\........\........\...............\duallink_444_alpha.vhd
.......\........\........\...............\ipt_smpte75.vhd
.......\........\........\...............\rle_75_75_bars.vhd
.......\........\........\...............\rle_chroma_bars_lut.vhd
.......\........\........\...............\rle_iq_pluge_lut.vhd
.......\........\........\...............\timing_pattern_v2.vhd
.......\........\........\ipt_3GB_demerge.vhd
.......\........\........\ipt_duallink_3GB_merge.vhd
.......\........\........\ipt_duallink_dp_rx_v3.vhd
.......\........\........\ipt_duallink_dp_tx_v3.vhd
.......\........\........\ipt_duallink_dp_v2.vhd
.......\........\........\ipt_duallink_split.vhd
.......\........\........\ipt_duallink_tpg.vhd
.......\........\........\ipt_retime.vhd
.......\........\........\ipt_smpte352_insert.vhd
.......\........\........\TimingGen.vhd
.......\........\........\Trs_Crc.vhd
.......\........\IO
.......\........\..\Descrambler.vhd
.......\........\..\ipt_crc_chk.vhd
.......\........\..\ipt_crc_ctrl.vhd
.......\........\..\ipt_deser_v3.vhd
.......\........\..\ipt_rx_clkin.vhd
.......\........\..\ipt_rx_io_top.vhd
.......\........\..\ipt_rx_top.vhd
.......\........\..\ipt_rx_vid_mon.vhd
.......\........\..\ipt_rx_vid_top.vhd
.......\........\..\ipt_scrambler.vhd
.......\........\..\ipt_ser_v2.vhd
.......\........\..\ipt_smpte352_extract.vhd
.......\........\..\ipt_std_detect.vhd
.......\........\..\ipt_sync_fifo.vhd
.......\........\..\ipt_tx_io.vhd
.......\........\..\ipt_tx_top.vhd
.......\........\TestBench
.......\........\.........\tb_ipt_duallink_clk.vhd
.......\........\.........\tb_ipt_duallink_retime.vhd
.......\........\.........\tb_ipt_duallink_top.vhd
.......\........\.........\tb_reg_write.vhd
.......\........\.........\tb_vid_gen.vhd
.......\........\alp_top_dual_VHDL.vhd
.......\........\ipt_duallink_top.vhd
.......\........\ipt_include.vhd
.......\........\nsm_top.vhd
README.txt