verilog implementation of structural FIR filter. Contains testbench, including sample data and coefficients.




File list:
filter
.....\adder.v
.....\andgt.v
.....\ant8out.bin
.....\antout.bin
.....\cdelay
.....\dotprod.v
.....\fa1bit.v
.....\fa1bit.v.bak
.....\fa1bit_gen.v
.....\fir.v
.....\firx08c06r12v060p2220.bin
.....\firx08c06r12v065p2220.bin
.....\firx08c06r12v070p2220.bin
.....\firx08c06r12v075p2220.bin
.....\firx08c06r12v080p2220.bin
.....\firx08c06r12v080p2580.bin
.....\firx08c06r12v085p2220.bin
.....\firx08c06r12v085p2580.bin
.....\firx08c06r12v090p2220.bin
.....\firx08c06r12v095p2220.bin
.....\firx08c06r12v095p2580.bin
.....\firx08c06r12v100p2220.bin
.....\firx08c06r12v100p2580.bin
.....\firx08c06r12v105p2220.bin
.....\firx08c06r12v105p2580.bin
.....\firx08c06r12v110p2220.bin
.....\firx08c06r12v110p2580.bin
.....\firx08c06r12v115p2220.bin
.....\firx08c06r12v115p2580.bin
.....\firx08c06r12v120p2220.bin
.....\firx08c06r12v120p2580.bin
.....\fir_test.v
.....\fir_test_gen.v
.....\mul16_080.bin
.....\mul16_085.bin
.....\mul16_090.bin
.....\mul16_095.bin
.....\mul16_100.bin
.....\mul16_105.bin
.....\mul16_110.bin
.....\mul16_115.bin
.....\mul16_120.bin
.....\mulb16v065p1390.bin
.....\mulb16v070p1390.bin
.....\mulb16v075p1390.bin
.....\mulb16v080p1390.bin
.....\mulb16v085p1390.bin
.....\mulb16v090p1390.bin
.....\mulb16v095p1390.bin
.....\mulb16v100p1390.bin
.....\mulb16v105p1390.bin
.....\mulb16v110p1390.bin
.....\mulb16v115p1390.bin
.....\mulb16v120p1390.bin
.....\multpr.v
.....\mul_test.v
.....\p3v12m8snrn12pnrca8b16t2400.out3
.....\run.sh
.....\run_fir.sh
.....\run_fir_vos.pl
.....\run_mul_vos.pl
.....\run_transposefir_vos.pl
.....\sumdelay
.....\transposefir.v
.....\transposefirx08c06r12v065p2040.bin
.....\transposefirx08c06r12v070p2040.bin
.....\transposefirx08c06r12v075p2040.bin
.....\transposefirx08c06r12v080p2040.bin
.....\transposefirx08c06r12v085p2040.bin
.....\transposefirx08c06r12v090p2040.bin
.....\transposefirx08c06r12v095p2040.bin
.....\transposefirx08c06r12v100p2040.bin
.....\transposefirx08c06r12v105p2040.bin
.....\transposefirx08c06r12v110p2040.bin
.....\transposefirx08c06r12v115p2040.bin
.....\transposefirx08c06r12v120p2040.bin
.....\transposefir_test.v
.....\transposefir_test_gen.v
.....\voltage
.....\vrlgout.bin