mux 4x1 wire command verilog code




File list:
4-1Multiplexer
.............\db
.............\..\4_1mux.cbx.xml
.............\..\4_1mux.cmp.rdb
.............\..\4_1mux.db_info
.............\..\4_1mux.eco.cdb
.............\..\4_1mux.hif
.............\..\4_1mux.map.qmsg
.............\..\4_1mux.map_bb.hdb
.............\..\4_1mux.pre_map.hdb
.............\..\4_1mux.sld_design_entry.sci
.............\..\4_1mux.smart_action.txt
.............\..\4_1mux.tis_db_list.ddb
.............\..\logic_util_heursitic.dat
.............\..\prev_cmp_4_1mux.map.qmsg
.............\..\prev_cmp_4_1mux.qmsg
.............\incremental_db
.............\..............\compiled_partitions
.............\..............\README
.............\4_1mux.flow.rpt
.............\4_1mux.map.rpt
.............\4_1mux.map.summary
.............\4_1mux.qpf
.............\4_1mux.qsf
.............\4_1mux.qws
.............\4_1mux.v
.............\4_1mux.v.bak
.............\mux4.v
.............\mux4.v.bak
.............\muxop.v
.............\muxop.v.bak