verilog code for bit stream adapters




File list:
BitStream2SPIAdapter
...................\work
...................\....\@barker@code@decision
...................\....\.....................\verilog.asm
...................\....\.....................\_primary.dat
...................\....\.....................\_primary.vhd
...................\....\@bit@stream2@s@p@i@adapter
...................\....\..........................\verilog.asm
...................\....\..........................\_primary.dat
...................\....\..........................\_primary.vhd
...................\....\@end@flag@decision
...................\....\..................\verilog.asm
...................\....\..................\_primary.dat
...................\....\..................\_primary.vhd
...................\....\@r@s@t@generator
...................\....\................\verilog.asm
...................\....\................\_primary.dat
...................\....\................\_primary.vhd
...................\....\@s@p@i@controller
...................\....\.................\verilog.asm
...................\....\.................\_primary.dat
...................\....\.................\_primary.vhd
...................\....\@shift@reg@controller
...................\....\.....................\verilog.asm
...................\....\.....................\_primary.dat
...................\....\.....................\_primary.vhd
...................\....\@total@system@controller
...................\....\........................\verilog.asm
...................\....\........................\_primary.dat
...................\....\........................\_primary.vhd
...................\....\testadapter
...................\....\...........\verilog.asm
...................\....\...........\_primary.dat
...................\....\...........\_primary.vhd
...................\....\_opt
...................\....\....\work_@barker@code@decision_fast.dt2
...................\....\....\work_@bit@stream2@s@p@i@adapter_fast.dt2
...................\....\....\work_@end@flag@decision_fast.dt2
...................\....\....\work_@r@s@t@generator_fast.dt2
...................\....\....\work_@s@p@i@controller_fast.dt2
...................\....\....\work_@shift@reg@controller_fast.dt2
...................\....\....\work_@total@system@controller_fast.dt2
...................\....\....\work_testadapter_fast.asm
...................\....\....\work_testadapter_fast.dt2
...................\....\....\work__info
...................\....\....\_deps
...................\....\_temp
...................\....\_info
...................\BarkerCodeDecision.v
...................\BarkerCodeDecision.v.bak
...................\BitStream2SPIAdapter.v
...................\BitStream2SPIAdapter.v.bak
...................\EndFlagDecision.v
...................\EndFlagDecision.v.bak
...................\RSTGenerator.v
...................\RSTGenerator.v.bak
...................\ShiftRegController.v
...................\ShiftRegController.v.bak
...................\SPIController.v
...................\SPIController.v.bak
...................\testadapter.cr.mti
...................\testadapter.mpf
...................\testadapter.v
...................\testadapter.v.bak
...................\TotalSystemController.v
...................\TotalSystemController.v.bak
...................\transcript
...................\vsim.wlf
...................\wave.do