[Clock-Divider] - this verilog program, Clock Divider, can be compiled successfully by Altera and ModelSIM.
[Clockdivider] - VHDL CODE FOR CLOCK DIVIDER
[divideer_2] - this is a 2 bit divider for xilinx whit ise 9.2
[DivideAndConquer] - Divide and conquer android game
[Convexhull by divide and conquer] - Convexhull (2D) to Divide and conquer is implemented in such a way that a clear algorithm stated. Similarly, it is also difficult to implement in code
[GL850G_48PIN_120_INDIVIDUAL] - GL850G drawings of the individual mode. Source code integrity, and can be used directly.
