Altera DE1 NIOS source program, very useful, you can directly use the full source code, has been tested and can be used directly.




File list:
DE1_NIOS
.......\.sopc_builder
.......\.............\install.ptf
.......\.............\install2.ptf
.......\.............\preferences.xml
.......\db
.......\..\DE1_NIOS.db_info
.......\..\DE1_NIOS.eco.cdb
.......\..\DE1_NIOS.sld_design_entry.sci
.......\system_0_sim
.......\............\atail-f.pl
.......\............\cfi_flash_0.dat
.......\............\cpu_0_bht_ram.dat
.......\............\cpu_0_bht_ram.hex
.......\............\cpu_0_dc_tag_ram.dat
.......\............\cpu_0_dc_tag_ram.hex
.......\............\cpu_0_ic_tag_ram.dat
.......\............\cpu_0_ic_tag_ram.hex
.......\............\cpu_0_ociram_default_contents.dat
.......\............\cpu_0_ociram_default_contents.hex
.......\............\cpu_0_rf_ram_a.dat
.......\............\cpu_0_rf_ram_a.hex
.......\............\cpu_0_rf_ram_b.dat
.......\............\cpu_0_rf_ram_b.hex
.......\............\create_system_0_project.do
.......\............\epcs_controller_boot_rom.dat
.......\............\epcs_controller_boot_rom.hex
.......\............\jtag_uart_0_input_mutex.dat
.......\............\jtag_uart_0_input_stream.dat
.......\............\jtag_uart_0_log.bat
.......\............\jtag_uart_0_output_stream.dat
.......\............\list_presets.do
.......\............\modelsim.tcl
.......\............\sdram_0.dat
.......\............\setup_sim.do
.......\............\uart_0_input_data_mutex.dat
.......\............\uart_0_input_data_stream.dat
.......\............\uart_0_log_module.txt
.......\............\virtuals.do
.......\............\wave_presets.do
.......\user_logic_SEG7_LUT_4
.......\.....................\class.ptf
.......\.....................\mk_user_logic_SEG7_LUT_4.pl
.......\.....................\SEG7_LUT.v
.......\.....................\SEG7_LUT_4.v
.......\user_logic_SRAM_16Bits_512K
.......\...........................\class.ptf
.......\...........................\mk_user_logic_SRAM_16Bits_512K.pl
.......\...........................\SRAM_16Bit_512K.v
.......\bht_ram.mif
.......\cpu_0.ocp
.......\cpu_0.sdc
.......\cpu_0.v
.......\cpu_0.vo
.......\cpu_0_bht_ram.mif
.......\cpu_0_dc_tag_ram.mif
.......\cpu_0_ic_tag_ram.mif
.......\cpu_0_jtag_debug_module.v
.......\cpu_0_jtag_debug_module_sysclk.v
.......\cpu_0_jtag_debug_module_tck.v
.......\cpu_0_jtag_debug_module_wrapper.v
.......\cpu_0_mult_cell.v
.......\cpu_0_ociram_default_contents.mif
.......\cpu_0_rf_ram_a.mif
.......\cpu_0_rf_ram_b.mif
.......\cpu_0_test_bench.v
.......\dc_tag_ram.mif
.......\DE1_NIOS.asm.rpt
.......\DE1_NIOS.cdf
.......\DE1_NIOS.done
.......\DE1_NIOS.fit.eqn
.......\DE1_NIOS.fit.rpt
.......\DE1_NIOS.fit.smsg
.......\DE1_NIOS.fit.summary
.......\DE1_NIOS.flow.rpt
.......\DE1_NIOS.map.eqn
.......\DE1_NIOS.map.rpt
.......\DE1_NIOS.map.smsg
.......\DE1_NIOS.map.summary
.......\DE1_NIOS.pin
.......\DE1_NIOS.pof
.......\DE1_NIOS.qpf
.......\DE1_NIOS.qsf
.......\DE1_NIOS.qws
.......\DE1_NIOS.sof
.......\DE1_NIOS.tan.rpt
.......\DE1_NIOS.tan.summary
.......\DE1_NIOS.v
.......\DE1_NIOS_assignment_defaults.qdf
.......\epcs_controller.v
.......\epcs_controller_boot_rom.hex
.......\ic_tag_ram.mif
.......\jtag_uart_0.v
.......\KEY.v
.......\LEDG.v
.......\LEDR.v
.......\Reset_Delay.v
.......\rf_ram_a.mif
.......\rf_ram_b.mif
.......\sdram_0.v
.......\sdram_0_test_component.v
.......\SDRAM_PLL.v
.......\SEG7.v
.......\SEG7_LUT.v
.......\SEG7_LUT_4.v
.......\sopc_add_qip_file.tcl
.......\sopc_builder_debug_log.txt
.......\sopc_builder_log.txt
.......\sram_0.v
.......\SRAM_16Bit_512K.v
.......\Switch.v
.......\system_0.bsf
.......\system_0.ptf
.......\system_0.ptf.5.10
.......\system_0.ptf.6.00
.......\system_0.ptf.8.00
.......\system_0.ptf.bak
.......\system_0.ptf.pre_generation_ptf
.......\system_0.qip
.......\system_0.sopc
.......\system_0.sopcinfo
.......\system_0.v
.......\system_0_generation_script
.......\system_0_log.txt
.......\system_0_setup_quartus.tcl
.......\uart_0.v
.......\user_logic_SRAM_16Bits_512K_0.v