Make adjustments in VGA by FPGA




File list:
SedaVga
......\vgalab1
......\.......\db
......\.......\..\add_sub_lkc.tdf
......\.......\..\add_sub_mkc.tdf
......\.......\..\alt_u_div_a2f.tdf
......\.......\..\alt_u_div_i2f.tdf
......\.......\..\alt_u_div_k2f.tdf
......\.......\..\logic_util_heursitic.dat
......\.......\..\lpm_divide_aem.tdf
......\.......\..\lpm_divide_eem.tdf
......\.......\..\lpm_divide_fem.tdf
......\.......\..\prev_cmp_vgalab1.qmsg
......\.......\..\sign_div_unsign_klh.tdf
......\.......\..\sign_div_unsign_olh.tdf
......\.......\..\sign_div_unsign_plh.tdf
......\.......\..\vgalab1.(0).cnf.cdb
......\.......\..\vgalab1.(0).cnf.hdb
......\.......\..\vgalab1.(1).cnf.cdb
......\.......\..\vgalab1.(1).cnf.hdb
......\.......\..\vgalab1.(10).cnf.cdb
......\.......\..\vgalab1.(10).cnf.hdb
......\.......\..\vgalab1.(11).cnf.cdb
......\.......\..\vgalab1.(11).cnf.hdb
......\.......\..\vgalab1.(12).cnf.cdb
......\.......\..\vgalab1.(12).cnf.hdb
......\.......\..\vgalab1.(13).cnf.cdb
......\.......\..\vgalab1.(13).cnf.hdb
......\.......\..\vgalab1.(14).cnf.cdb
......\.......\..\vgalab1.(14).cnf.hdb
......\.......\..\vgalab1.(15).cnf.cdb
......\.......\..\vgalab1.(15).cnf.hdb
......\.......\..\vgalab1.(16).cnf.cdb
......\.......\..\vgalab1.(16).cnf.hdb
......\.......\..\vgalab1.(17).cnf.cdb
......\.......\..\vgalab1.(17).cnf.hdb
......\.......\..\vgalab1.(18).cnf.cdb
......\.......\..\vgalab1.(18).cnf.hdb
......\.......\..\vgalab1.(19).cnf.cdb
......\.......\..\vgalab1.(19).cnf.hdb
......\.......\..\vgalab1.(2).cnf.cdb
......\.......\..\vgalab1.(2).cnf.hdb
......\.......\..\vgalab1.(20).cnf.cdb
......\.......\..\vgalab1.(20).cnf.hdb
......\.......\..\vgalab1.(3).cnf.cdb
......\.......\..\vgalab1.(3).cnf.hdb
......\.......\..\vgalab1.(4).cnf.cdb
......\.......\..\vgalab1.(4).cnf.hdb
......\.......\..\vgalab1.(5).cnf.cdb
......\.......\..\vgalab1.(5).cnf.hdb
......\.......\..\vgalab1.(6).cnf.cdb
......\.......\..\vgalab1.(6).cnf.hdb
......\.......\..\vgalab1.(7).cnf.cdb
......\.......\..\vgalab1.(7).cnf.hdb
......\.......\..\vgalab1.(8).cnf.cdb
......\.......\..\vgalab1.(8).cnf.hdb
......\.......\..\vgalab1.(9).cnf.cdb
......\.......\..\vgalab1.(9).cnf.hdb
......\.......\..\vgalab1.amm.cdb
......\.......\..\vgalab1.asm.qmsg
......\.......\..\vgalab1.asm.rdb
......\.......\..\vgalab1.asm_labs.ddb
......\.......\..\vgalab1.cbx.xml
......\.......\..\vgalab1.cmp.bpm
......\.......\..\vgalab1.cmp.cdb
......\.......\..\vgalab1.cmp.hdb
......\.......\..\vgalab1.cmp.kpt
......\.......\..\vgalab1.cmp.logdb
......\.......\..\vgalab1.cmp.rdb
......\.......\..\vgalab1.cmp0.ddb
......\.......\..\vgalab1.cmp1.ddb
......\.......\..\vgalab1.cmp_merge.kpt
......\.......\..\vgalab1.db_info
......\.......\..\vgalab1.fit.qmsg
......\.......\..\vgalab1.hier_info
......\.......\..\vgalab1.hif
......\.......\..\vgalab1.idb.cdb
......\.......\..\vgalab1.lpc.html
......\.......\..\vgalab1.lpc.rdb
......\.......\..\vgalab1.lpc.txt
......\.......\..\vgalab1.map.bpm
......\.......\..\vgalab1.map.cdb
......\.......\..\vgalab1.map.hdb
......\.......\..\vgalab1.map.kpt
......\.......\..\vgalab1.map.logdb
......\.......\..\vgalab1.map.qmsg
......\.......\..\vgalab1.map_bb.cdb
......\.......\..\vgalab1.map_bb.hdb
......\.......\..\vgalab1.map_bb.logdb
......\.......\..\vgalab1.pre_map.cdb
......\.......\..\vgalab1.pre_map.hdb
......\.......\..\vgalab1.root_partition.map.reg_db.cdb
......\.......\..\vgalab1.rtlv.hdb
......\.......\..\vgalab1.rtlv_sg.cdb
......\.......\..\vgalab1.rtlv_sg_swap.cdb
......\.......\..\vgalab1.sgdiff.cdb
......\.......\..\vgalab1.sgdiff.hdb
......\.......\..\vgalab1.sld_design_entry.sci
......\.......\..\vgalab1.sld_design_entry_dsc.sci
......\.......\..\vgalab1.smart_action.txt
......\.......\..\vgalab1.sta.qmsg
......\.......\..\vgalab1.sta.rdb
......\.......\..\vgalab1.sta_cmp.6_slow.tdb
......\.......\..\vgalab1.syn_hier_info
......\.......\..\vgalab1.tis_db_list.ddb
......\.......\..\vgalab1.tmw_info
......\.......\incremental_db
......\.......\..............\compiled_partitions
......\.......\..............\...................\vgalab1.db_info
......\.......\..............\...................\vgalab1.root_partition.cmp.cdb
......\.......\..............\...................\vgalab1.root_partition.cmp.dfp
......\.......\..............\...................\vgalab1.root_partition.cmp.hdb
......\.......\..............\...................\vgalab1.root_partition.cmp.kpt
......\.......\..............\...................\vgalab1.root_partition.cmp.logdb
......\.......\..............\...................\vgalab1.root_partition.cmp.rcfdb
......\.......\..............\...................\vgalab1.root_partition.map.cdb
......\.......\..............\...................\vgalab1.root_partition.map.dpi
......\.......\..............\...................\vgalab1.root_partition.map.hbdb.cdb
......\.......\..............\...................\vgalab1.root_partition.map.hbdb.hb_info
......\.......\..............\...................\vgalab1.root_partition.map.hbdb.hdb
......\.......\..............\...................\vgalab1.root_partition.map.hbdb.sig
......\.......\..............\...................\vgalab1.root_partition.map.hdb
......\.......\..............\...................\vgalab1.root_partition.map.kpt
......\.......\..............\README
......\.......\bars.v
......\.......\bars.v.bak
......\.......\DE2_pin_assignments.csv
......\.......\reset_delay.v
......\.......\vgalab1.asm.rpt
......\.......\vgalab1.done
......\.......\vgalab1.fit.rpt
......\.......\vgalab1.fit.summary
......\.......\vgalab1.flow.rpt
......\.......\vgalab1.jdi
......\.......\vgalab1.map.rpt
......\.......\vgalab1.map.smsg
......\.......\vgalab1.map.summary
......\.......\vgalab1.pin
......\.......\vgalab1.pof
......\.......\vgalab1.qpf
......\.......\vgalab1.qsf
......\.......\vgalab1.qws
......\.......\vgalab1.sof
......\.......\vgalab1.sta.rpt
......\.......\vgalab1.sta.summary
......\.......\vgalab1.v
......\.......\vgalab1.v.bak
......\.......\vgalab1_assignment_defaults.qdf
......\.......\VGA_Audio_PLL - Copy.v
......\.......\VGA_Audio_PLL.ppf
......\.......\VGA_Audio_PLL.v
......\.......\VGA_Controller.v
......\.......\VGA_Controller.v.bak
......\.......\vga_sync.v
......\.......\vga_sync.v.bak