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cordic
  • Classification:Hardware/embedded - VHDL Develop
  • Development Tool:VHDL
  • Sise:133 KB
  • Upload time:2013/11/29 6:09:06
  • Uploader:aernav
  • Download Statistics:
Description
cordic processor design in vhdl




File list:
cordic
.....\hdl
.....\...\addsub_synthesis.vhd
.....\...\atan32_Arch1.vhd
.....\...\clockgen_rtl.vhd
.....\...\cordic_pkg_pkg.vhd
.....\...\cordic_synthesis.vhd
.....\...\cordic_tb_struct.vhd
.....\...\cordic_tester_behavioral.vhd
.....\...\fsm_synthesis.vhd
.....\...\shiftn_synthesis.vhd
.....\iseconfig
.....\.........\cordic.projectmgr
.....\.........\cordic_tb.xreport
.....\src
.....\...\.xrf
.....\...\....\addsub_synthesis.xrf
.....\...\....\atan32_Arch1.xrf
.....\...\....\clockgen_rtl.xrf
.....\...\....\cordic_pkg_pkg.xrf
.....\...\....\cordic_pkg_pkg_body.xrf
.....\...\....\cordic_synthesis.xrf
.....\...\....\cordic_tb_struct.xrf
.....\...\....\cordic_tester_behavioral.xrf
.....\...\....\fsm_synthesis.xrf
.....\...\....\shiftn_synthesis.xrf
.....\...\addsub
.....\...\......\synthesis.vhd.info
.....\...\......\..................\structure.dh
.....\...\......\default_view
.....\...\......\symbol.sb
.....\...\......\synthesis.vhd
.....\...\atan32
.....\...\......\Arch1.vhd.info
.....\...\......\..............\structure.dh
.....\...\......\Arch1.vhd
.....\...\......\default_view
.....\...\......\symbol.sb
.....\...\clockgen
.....\...\........\rtl.vhd.info
.....\...\........\............\structure.dh
.....\...\........\default_view
.....\...\........\rtl.vhd
.....\...\........\symbol.sb
.....\...\cordic
.....\...\......\default_view
.....\...\......\symbol.sb
.....\...\......\synthesis.bd
.....\...\cordic_pkg
.....\...\..........\cordic_pkg.info
.....\...\..........\...............\structure.dh
.....\...\..........\_package.vhd
.....\...\..........\_package_body.vhd
.....\...\cordic_tb
.....\...\.........\default_view
.....\...\.........\struct.bd
.....\...\.........\symbol.sb
.....\...\cordic_tester
.....\...\.............\behavioral.vhd.info
.....\...\.............\...................\structure.dh
.....\...\.............\...................\testvec.txt
.....\...\.............\behavioral.vhd
.....\...\.............\default_view
.....\...\.............\interface
.....\...\fsm
.....\...\...\default_view
.....\...\...\symbol.sb
.....\...\...\synthesis.sm
.....\...\shiftn
.....\...\......\synthesis.vhd.info
.....\...\......\..................\structure.dh
.....\...\......\default_view
.....\...\......\symbol.sb
.....\...\......\synthesis.vhd
.....\work_mti
.....\........\compile.scr
.....\........\modelsim.ini
.....\........\modelsim.tcl
.....\........\tb.do
.....\........\tb.scr
.....\........\_info
.....\work_ps
.....\.......\add_files.tcl
.....\xst
.....\...\projnav.tmp
.....\...\work
.....\...\....\work.vdbl
.....\...\....\work.vdbx
.....\_xmsgs
.....\......\pn_parser.xmsgs
.....\......\xst.xmsgs
.....\addsub.lso
.....\addsub.prj
.....\addsub.stx
.....\addsub.xst
.....\addsub_synthesis.vhd
.....\atan32_Arch1.vhd
.....\behavioral.vhd
.....\clockgen.lso
.....\clockgen.prj
.....\clockgen.stx
.....\clockgen.xst
.....\clockgen_rtl.vhd
.....\cordic.gise
.....\cordic.lso
.....\cordic.prj
.....\cordic.stx
.....\cordic.xise
.....\cordic.xst
.....\cordic_pkg.lso
.....\cordic_pkg.prj
.....\cordic_pkg.stx
.....\cordic_pkg.xst
.....\cordic_pkg_pkg.vhd
.....\cordic_synthesis.vhd
.....\cordic_tb.cmd_log
.....\cordic_tb.lso
.....\cordic_tb.prj
.....\cordic_tb.stx
.....\cordic_tb.syr
.....\cordic_tb.xst
.....\cordic_tb_envsettings.html
.....\cordic_tb_struct.vhd
.....\cordic_tb_summary.html
.....\cordic_tb_xst.xrpt
.....\cordic_tester.lso
.....\cordic_tester.prj
.....\cordic_tester.stx
.....\cordic_tester.xst
.....\cordic_tester_behavioral.vhd
.....\fsm_synthesis.vhd
.....\shiftn_synthesis.vhd
.....\testvec.txt
.....\webtalk_pn.xml
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[Cordic] - VHDL CODE FOR CORDIC ALGORITHM FOR COS AND SINE GENERATION
[cordic] - a survey of cordic algorithms corcic_elementary function computation using recursive sequences.
[CORDIC-example-code] - CORDIC Actel example VHDL code
[cordic] - cordic algorithm verilog
[ISD4002_RecordingCircuit] - ISD4002 Recording Circuit integrity of the source code can be used directly.
[HAccordiion] - Acordian component for flex 3
[symbian phone call recording program...] - symbian s60 platform for users to monitor phones, when users dial or answer the phone, automatic call recording
[cordicc] - Cordic algorithm description and C/Asm51 sourcecode examples
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