MIPS multicycle Implementation in Verilog




File list:
a.out
alu2.v
alucontrol2.v
controller.sav
controller_8bit.v
datapath.sav
datapath.v
exmemory_8bit.v
ex_memory_alucontroller.sav
final1.vcd
mips.v
mips_mem_8bit.v
otherstuff.v
regfile.v