VHDL code...using Quartus




File list:
4_1 mux
......\4_1_mux.vhd
BCD_seven segment
................\bcd_7segment.asm.rpt
................\bcd_7segment.done
................\bcd_7segment.fit.rpt
................\bcd_7segment.fit.summary
................\bcd_7segment.flow.rpt
................\bcd_7segment.map.rpt
................\bcd_7segment.map.summary
................\bcd_7segment.pin
................\bcd_7segment.pof
................\bcd_7segment.qpf
................\bcd_7segment.qsf
................\bcd_7segment.qws
................\bcd_7segment.sim.rpt
................\bcd_7segment.tan.rpt
................\bcd_7segment.tan.summary
................\bcd_7segment.vhd
................\bcd_7segment.vhd.bak
................\bcd_7segment.vwf
F_adder
......\F_adder.asm.rpt
......\F_adder.done
......\F_adder.fit.rpt
......\F_adder.fit.summary
......\F_adder.flow.rpt
......\F_adder.map.rpt
......\F_adder.map.summary
......\F_adder.pin
......\F_adder.pof
......\F_adder.qpf
......\F_adder.qsf
......\F_adder.qws
......\F_adder.sim.rpt
......\F_adder.tan.rpt
......\F_adder.tan.summary
......\F_adder.vhd
......\F_adder.vhd.bak
......\F_adder.vwf
JK_Flip flop
...........\JK_FF.asm.rpt
...........\JK_FF.done
...........\JK_FF.fit.rpt
...........\JK_FF.fit.summary
...........\JK_FF.flow.rpt
...........\JK_FF.map.rpt
...........\JK_FF.map.summary
...........\JK_FF.pin
...........\JK_FF.pof
...........\JK_FF.qpf
...........\JK_FF.qsf
...........\JK_FF.qws
...........\JK_FF.sim.rpt
...........\JK_FF.tan.rpt
...........\JK_FF.tan.summary
...........\JK_FF.vhd
...........\JK_FF.vhd.bak
...........\JK_FF.vwf
SR_fipflop
.........\SR_FF.done
.........\SR_FF.fit.rpt
.........\SR_FF.fit.summary
.........\SR_FF.flow.rpt
.........\SR_FF.map.rpt
.........\SR_FF.map.summary
.........\SR_FF.pin
.........\SR_FF.pof
.........\SR_FF.qpf
.........\SR_FF.qsf
.........\SR_FF.qws
.........\SR_FF.sim.rpt
.........\SR_FF.tan.rpt
.........\SR_FF.tan.summary
.........\SR_FF.vhd
.........\SR_FF.vhd.bak
.........\SR_FF.vwf